The manufacture of semiconductor devices such as integrated circuits (IC's) typically requires heat treating silicon wafers in the presence of reactive gases. During this process, the temperatures and gas concentrations to which the devices are exposed must be carefully controlled, as the devices often include circuitry elements less than 1 um in size which are sensitive to minute variations in the processing environment.
The semiconductor manufacturing industry typically processes the wafers in either horizontal or vertical carriers. The horizontal carrier, typically called a "boat", has three or four horizontally disposed bars arranged in a semicircle design, with each bar having inwardly facing grooves set therein at regular intervals. Each set of grooves define a vertical space for carrying a vertically disposed wafer.
The vertical carrier, typically called a "vertical rack", has three or four vertically disposed rods arranged in a semicircle design, with each post having slots set therein at regular intervals to define a space for carrying a horizontally disposed wafer. A conventional vertical rack is shown in FIG. 1. This rack typically has a top plate, a bottom plate, and three or four posts for fixing the top plate to the bottom plate. The portions of the post between each slot, termed "teeth", are identically spaced in order to support wafers at regular intervals from and parallel to the bottom plate. The entire rack is then placed within a vertical furnace for processing the wafers. Because a wafer processed on a vertical rack experiences less of a temperature gradient over its face, semiconductor manufacturers are increasingly turning to vertical furnaces. There is, however, a drawback to vertical furnacing. As shown in prior art FIG. 1, the wafers disposed on a conventional vertical rack are supported at their outside edge only. As such, the areas of the wafer resting on these teeth experience higher stress than the rest of the wafer. When temperatures in the furnace exceed about 1000.degree. C., these stresses often become significant and portions of the single crystal wafer move relative to each other along crystallographic plates in response to that stress. This phenomenon, called "slip", effectively destroys the value of the semiconductor devices located in the area of the wafer where slip has occurred.
Therefore, there is a need for a vertical rack design which alleviates slip.